Job role: DVT senior engineer
Location: San Jose, CA
JD:
Board Bring Up & Debug
Lead first power on, early bring up, and stabilization of complex PCB designs
Validate power sequencing, voltage rails, clocks, resets, and boot paths
Debug board level issues using schematics, layout, datasheets, and lab instrumentation
Perform root cause analysis on power, signal integrity, thermal, and functional failures
DVT (Design Validation Test) Execution
Develop and execute DVT plans covering functional, electrical, performance, and stress testing
Validate high speed interfaces (PCIe Gen4/Gen5, Ethernet, SerDes, GT links, DDR/LPDDR, OAM, optical modules)
Drive corner testing (voltage, temperature, frequency, load conditions)
Identify, track, and close hardware issues through DVT phases
System & Firmware Collaboration
Work closely with firmware, BIOS, BMC, and driver teams during bring up
Support FPGA/SoC configuration, boot flow, and debug (JTAG, XVC, UART, I2C, SPI)
Assist with automation of bring up and test scripts (Python, shell, lab tools)
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